This work presents a symbolic approach for estimating the energy consumption for nested loop programs when mapped and scheduled on parallel processor array accelerator architectures. Instead of simulation-based evaluation, we derive a methodology for symbolic energy analysis that captures the impact of mapping and scheduling decisions of loop nests on processor arrays. We compare our approach against simulation-based results for selected benchmarks and varying sizes of the iteration spaces. Whereas the latter are not scalable, our symbolic analysis is shown to be independent of the problem size. The presented evaluation methodology can be beneficially used during the design space exploration of mapping and scheduling decisions, for studying the influence of array size variations, and for comparisons with other loop nest accelerator architectures.

翻译：本文提出了一种符号化方法，用于估算嵌套循环程序在并行处理器阵列加速器架构上映射和调度时的能耗。不同于基于模拟的评估方法，我们推导了一套符号化能耗分析的方法论，该方法能够捕捉循环嵌套的映射与调度决策对处理器阵列产生的影响。我们将该方法与针对选定基准测试及不同迭代空间规模的模拟结果进行了比较。后者不具备可扩展性，而我们的符号化分析则被证明与问题规模无关。所提出的评估方法论可有效应用于映射与调度决策的设计空间探索、阵列规模变化影响的研究，以及与其他循环嵌套加速器架构的对比分析。