The governance of frontier AI increasingly relies on controlling access to computational resources, yet the hardware-level mechanisms invoked by policy proposals remain largely unexamined from an engineering perspective. This paper bridges the gap between AI governance and computer engineering by proposing a taxonomy of 20 hardware-level governance mechanisms, organised by function (monitoring, verification, enforcement) and assessed for technical feasibility on a four-point scale from currently deployable to speculative. For each mechanism, we provide a technical description, a feasibility rating, and an identification of adversarial vulnerabilities. We map the taxonomy onto four governance scenarios: domestic regulation, bilateral agreements, multilateral treaty verification, and industry self-regulation. Our analysis reveals a structural mismatch: the mechanisms most needed for treaty verification, including on-chip compute metering, cryptographic proof-of-training, and hardware-embedded enforcement, are also the least mature. We assess principal threats to compute-based governance, including algorithmic efficiency gains, distributed training methods, and sovereignty concerns. We identify a temporal constraint: the window during which semiconductor manufacturing concentration makes hardware-level governance implementable is narrowing, while R&D timelines for critical mechanisms span years. We present an adversary-tiered threat analysis distinguishing commercial, non-state, and nation-state actors, arguing the appropriate security standard is tamper-evident assurance analogous to IAEA verification rather than absolute tamper-proofing. The taxonomy, feasibility classification, and mechanism-to-scenario mapping provide a technical foundation for policymakers and identify the R&D investments required before hardware-level governance can support verifiable international agreements.

翻译：前沿人工智能的治理日益依赖于对计算资源的访问控制，然而政策提案所引用的硬件层面机制仍鲜少从工程角度进行审视。本文通过提出包含20种硬件层面治理机制的分类体系，弥合了人工智能治理与计算机工程之间的鸿沟。该体系按功能（监控、验证、执行）进行组织，并采用从当前可部署到理论推测的四级技术可行性评估标准。针对每种机制，我们提供技术描述、可行性评级及对抗性漏洞识别。我们将该分类体系映射至四种治理场景：国内监管、双边协议、多边条约验证及行业自律。分析揭示结构性错配：条约验证最需要的机制（包括芯片级计算计量、加密训练证明及硬件嵌入执行）恰恰成熟度最低。我们评估了基于计算的治理面临的主要威胁，包括算法效率提升、分布式训练方法及主权关切。研究识别出时间约束：半导体制造集中性使硬件层面治理可实施的政策窗口正在收窄，而关键机制的研发周期却需数年之久。我们提出基于对手层级威胁分析框架，区分商业实体、非国家行为体及主权国家行为体，论证应采用类似于国际原子能机构核查的防篡改可追溯保证标准，而非绝对防篡改。该分类体系、可行性分级及机制-场景映射为政策制定者提供技术基础，并明确了在硬件层面治理能够支撑可验证国际协议之前所需的研发投入重点。