Analog and mixed-signal (AMS) circuit design remains heavily reliant on expert knowledge. While recent AI-driven automation tools can generate candidate topologies, they critically depend on manually curated datasets with functional and performance annotations -- a requirement that current large language models (LLMs) and vision models cannot automate. Existing approaches still require domain experts to manually interpret circuit functionality. We present AMSnet-q, a fully automated, unsupervised pipeline that eliminates human-in-the-loop annotation by converting schematic images directly into a labeled AMS circuit database. Unlike prior work that stops at netlist extraction, our framework automates the complete verification loop: it performs schematic-to-netlist conversion, topology-aware testbench generation, and simulation-based sizing validation to objectively determine circuit functionality. Validated in 28 nm technology, AMSnet-q processed 739 schematics from the AMSnet 1.0 dataset, automatically constructing a repository of 4 circuit classes, 105 distinct topologies, and 89,789 labeled device configurations. By decoupling human effort from dataset volume and reducing the workload to a one-time testbench template per circuit class, AMSnet-q enables scalable, objective, and fully automated AMS database construction.

翻译：模拟与混合信号电路设计仍高度依赖专家知识。尽管近期基于人工智能的自动化工具能够生成候选拓扑结构，但其关键依赖于人工标注功能与性能信息的数据集——现有大语言模型和视觉模型均无法实现该需求的自动化。现有方法仍需领域专家手动解读电路功能。本文提出AMSnet-q，一个全自动无监督流水线框架，通过将原理图直接转化为带标注的AMS电路数据库，消除了依赖人工标注的循环。不同于仅停留在网表提取阶段的既往研究，本框架可自动完成完整验证闭环：实现原理图到网表的转换、拓扑感知测试平台生成、以及基于仿真的尺寸验证，从而客观判定电路功能。经28纳米工艺验证，AMSnet-q处理了AMSnet 1.0数据集的739张原理图，自动构建包含4类电路、105种独特拓扑及89,789个标注器件配置的存储库。通过将人力投入与数据集规模解耦，并将工作量缩减至每类电路仅需一次性的测试平台模板，AMSnet-q实现了可扩展、客观且全自动的AMS数据库构建。