Realizing computationally complex quantum circuits in the presence of noise and imperfections is a challenging task. While fault-tolerant quantum computing provides a route to reducing noise, it requires a large overhead for generic algorithms. Here, we develop and analyze a hardware-efficient, fault-tolerant approach to realizing complex sampling circuits. We co-design the circuits with the appropriate quantum error correcting codes for efficient implementation in a reconfigurable neutral atom array architecture, constituting what we call a fault-tolerant compilation of the sampling algorithm. Specifically, we consider a family of $[[2^D , D, 2]]$ quantum error detecting codes whose transversal and permutation gate set can realize arbitrary degree-$D$ instantaneous quantum polynomial (IQP) circuits. Using native operations of the code and the atom array hardware, we compile a fault-tolerant and fast-scrambling family of such IQP circuits in a hypercube geometry, realized recently in the experiments by Bluvstein et al. [Nature 626, 7997 (2024)]. We develop a theory of second-moment properties of degree-$D$ IQP circuits for analyzing hardness and verification of random sampling by mapping to a statistical mechanics model. We provide evidence that sampling from hypercube IQP circuits is classically hard to simulate and analyze the linear cross-entropy benchmark (XEB) in comparison to the average fidelity. To realize a fully scalable approach, we first show that Bell sampling from degree-$4$ IQP circuits is classically intractable and can be efficiently validated. We further devise new families of $[[O(d^D),D,d]]$ color codes of increasing distance $d$, permitting exponential error suppression for transversal IQP sampling. Our results highlight fault-tolerant compiling as a powerful tool in co-designing algorithms with specific error-correcting codes and realistic hardware.
翻译:在存在噪声和缺陷的情况下实现计算复杂的量子电路是一项具有挑战性的任务。尽管容错量子计算提供了降低噪声的途径,但其对通用算法需要巨大的开销。在此,我们开发并分析了一种硬件高效的容错方法,用于实现复杂的采样电路。我们协同设计了电路与合适的量子纠错码,以在可重构中性原子阵列架构中高效实现,这构成了我们所谓的采样算法的容错编译。具体而言,我们考虑一族$[[2^D , D, 2]]$量子纠错检测码,其横向和置换门集可实现任意$D$次瞬时量子多项式(IQP)电路。利用该码和原子阵列硬件的原生操作,我们在超立方体几何结构中编译了一族容错且快速扰乱的IQP电路,该结构最近在Bluvstein等人的实验[Nature 626, 7997 (2024)]中实现。我们通过映射到统计力学模型,发展了$D$次IQP电路二阶矩性质的理论,用于分析随机采样的困难性和验证。我们提供了证据表明,从超立方体IQP电路采样在经典计算上是困难的,并分析了线性交叉熵基准(XEB)与平均保真度的比较。为实现完全可扩展的方法,我们首先证明从$4$次IQP电路的贝尔采样在经典上不可处理且可高效验证。我们进一步设计了距离$d$递增的$[[O(d^D),D,d]]$颜色码新族,实现了横向IQP采样的指数级错误抑制。我们的结果突显了容错编译作为将特定纠错码与真实硬件协同设计算法中的强大工具。