We report preliminary results on using the MEMCPU\texttrademark{} Platform to compute the prime factorization of large biprimes. The first approach, the direct model, directly returns the factors of a given biprime. The second approach, the congruence model, returns smooth congruences to address the bottleneck of standard sieve methods. The models have size-dependent structure, and the MEMCPU Platform requires structure-dependent tuning for optimal performance. Therefore, for both models, we tuned the platform on sample problems up to a given size according to available resources. Then we generated RSA-like benchmark biprimes to perform rigorous scaling analysis. The MEMCPU timings over the tuned range followed low degree polynomials in the number of bits, markedly different than other tested methods including general number field sieve. MEMCPU's congruence model was the most promising, which was scaled up to 300-bit factorization problems while following a $2^{nd}$ degree polynomial fit. We also discuss the approach to tuning the MEMCPU Platform for problems beyond the reach of today's most advanced methods. Finally, basic analysis of the acceleration expected from an ASIC implementation is provided and suggests the possibility of real time factorization of large biprimes.

翻译：我们报告了使用MEMCPU™平台计算大双素数素因数分解的初步结果。第一种方法称为直接模型，直接返回给定双素数的因数。第二种方法称为同余模型，返回光滑同余以解决标准筛方法的瓶颈问题。这些模型具有依赖于大小的结构，而MEMCPU平台需要依赖结构的调优以达到最佳性能。因此，对于这两种模型，我们根据可用资源对样本问题进行调优，直至给定大小。然后，我们生成了类似RSA的基准双素数以进行严格的规模分析。经过调优范围内的MEMCPU计时结果遵循比特数的低次多项式，明显不同于其他测试方法（包括通用数域筛法）。MEMCPU的同余模型最具潜力，在遵循二次多项式拟合的同时，可扩展至300比特的因数分解问题。我们还讨论了如何对MEMCPU平台进行调优以应对当今最先进方法无法触及的问题。最后，给出了对专用集成电路（ASIC）实现预期加速的基本分析，并指出实时分解大双素数的可能性。