Digital Compute-in-Memory (DCiM) reduces data movement and has become a promising solution for energy-efficient edge AI. However, most existing DCiM frameworks still primarily target integer or fixed-point arithmetic, and provide limited support for compiler-integrated and accuracy-configurable floating-point computation. Directly integrating conventional IEEE 754 floating-point units into dense SRAM-based DCiM arrays, however, incurs high area and power overhead. To address this challenge, this work presents an accuracy-configurable floating-point multiplier integrated into the OpenACM framework for SRAM-based DCiM. An exact IEEE~754-compliant multiplier is first implemented as a baseline, and a mantissa-segmentation-based approximate multiplier is then proposed to reduce hardware cost while preserving numerical fidelity. Post-layout results show up to 69% logic area reduction and 72% power savings over exact floating-point designs without delay overhead. Evaluations on image processing tasks and ResNet-18 inference further demonstrate negligible accuracy degradation. These results indicate that compiler-integrated approximate floating-point multiplication is a practical approach for enabling efficient and configurable floating-point support in SRAM-based DCiM systems. The Floating-Point Multiplier is available on https://github.com/ShenShan123/OpenACM

翻译：数字存内计算（DCiM）可减少数据搬移，已成为能效边缘AI领域颇具前景的解决方案。然而，现有DCiM框架主要针对整数或定点运算，对编译器集成且精度可配置的浮点运算支持有限。若直接将传统IEEE 754浮点单元集成至高密度SRAM基DCiM阵列，将产生巨大的面积和功耗开销。为应对这一挑战，本文提出一种集成于OpenACM框架中、适用于SRAM基DCiM的精度可配置浮点乘法器。首先实现精确兼容IEEE 754的基线乘法器，进而提出基于尾数分割的近似乘法器，在降低硬件成本的同时保持数值精度。后布局布线结果显示，与精确浮点设计相比，逻辑面积最高减少69%，功耗节省72%，且无延迟代价。图像处理任务及ResNet-18推理评估进一步表明精度退化可忽略。这些结果表明，编译器集成的近似浮点乘法是一种在SRAM基DCiM系统中实现高效可配置浮点支持的实用方法。该浮点乘法器开源地址：https://github.com/ShenShan123/OpenACM