This letter introduces a framework for the automatic generation of hardware cores for Artificial Neural Network (ANN)-based chaotic oscillators. The framework trains the model to approximate a chaotic system, then performs design space exploration yielding potential hardware architectures for its implementation. The framework then generates the corresponding synthesizable High-Level Synthesis code and a validation testbench from a selected solution. The hardware design primarily targets FPGAs. The proposed framework offers a rapid hardware design process of candidate architectures superior to manually designed works in terms of hardware cost and throughput. The source code is available on GitHub.

翻译：本文提出了一种用于自动生成基于人工神经网络（ANN）的混沌振荡器硬件核的框架。该框架首先训练模型以逼近混沌系统，随后执行设计空间探索，生成潜在的硬件架构方案。选定解决方案后，框架将自动生成对应的可综合高层次综合代码及验证测试平台。该硬件设计主要面向现场可编程门阵列（FPGA）。所提出的框架能够快速生成候选架构的硬件设计方案，在硬件成本与吞吐量方面均优于人工设计成果。源代码已在GitHub平台开源。