Skiplists are used in a variety of applications for storing data subject to order criteria. In this article we discuss the design, analysis and performance of a concurrent deterministic skiplist on many-core NUMA nodes. We also evaluate the performance of concurrent lock-free unbounded queue implementation and two concurrent multi-reader,multi-writer(MWMR) hash table implementations and compare them with those from Intel's Thread Building Blocks(TBB) library. We introduce strategies for memory management that reduce page faults and cache misses for the memory access patterns in these data structures. This paper proposes hierarchical usage of concurrent data structures in programs to improve memory latencies by reducing memory accesses from remote NUMA nodes.

翻译：跳表广泛应用于需按序存储数据的各类场景。本文探讨了面向众核NUMA节点的并发确定性跳表的设计、分析与性能表现。同时评估了无锁并发无界队列及两种并发多读多写哈希表的实现性能，并与英特尔TBB库中的对应实现进行对比。针对这些数据结构的内存访问模式，本文提出了可减少页错误与缓存失效的内存管理策略。通过构建并发数据结构的层次化使用方案，减少远程NUMA节点的内存访问，从而改善程序的内存访问延迟。