This paper investigates an emerging cache side channel attack defense approach involving the use of hardware performance counters (HPCs). These counters monitor microarchitectural events and analyze statistical deviations to differentiate between malicious and benign software. With numerous proposals and promising reported results, we seek to investigate whether published HPC-based detection methods are evaluated in a proper setting and under the right assumptions, such that their quality can be ensured for real-word deployment against cache side-channel attacks. To achieve this goal, this paper presents a comprehensive evaluation and scrutiny of existing literature on the subject matter in a form of a survey, accompanied by experimental evidences to support our evaluation.

翻译：本文研究一种新兴的缓存侧信道攻击防御方法，该方法涉及使用硬件性能计数器（HPCs）。这些计数器监控微架构事件并分析统计偏差，以区分恶意软件与良性软件。鉴于已有大量相关方案和令人鼓舞的报告结果，我们旨在探究已发表的基于HPC的检测方法是否在适当的设置和正确的假设下进行评估，从而确保其在实际部署中对抗缓存侧信道攻击的质量。为实现这一目标，本文以综述的形式对现有文献进行全面的评估与审视，并辅以实验证据支持我们的评估。