The automated generation of hardware register-transfer level (RTL) code with large language models (LLMs) shows promise, yet current solutions struggle to produce syntactically and functionally correct code for complex digital designs. This paper introduces MeltRTL, a novel framework that integrates multi-expert attention with inference-time intervention (ITI) to significantly improve LLM-based RTL code generation accuracy without retraining the base model. MeltRTL introduces three key innovations: (1) A multi-expert attention architecture that dynamically routes design specifications to specialized expert networks, enabling targeted reasoning across various hardware categories; (2) An inference-time intervention mechanism that employs non-linear probes to detect and correct hardware-specific inaccuracies during generation; and (3) An efficient intervention framework that selectively operates on expert-specific attention heads with minimal computational overhead. We evaluate MeltRTL on the VerilogEval benchmark, achieving 96% synthesizability and 60% functional correctness, compared to the base LLM's 85.3% and 45.3%, respectively. These improvements are obtained entirely at inference time, with only 27% computational overhead and no model fine-tuning, making MeltRTL immediately deployable on existing pre-trained LLMs. Ablation studies further show the complementary benefits of multi-expert architecture and ITI, highlighting their synergistic effects when combined.

翻译：利用大语言模型（LLM）自动生成硬件寄存器传输级（RTL）代码展现出潜力，但现有方案难以针对复杂数字设计生成语法和功能均正确的代码。本文提出MeltRTL，一个集成多专家注意力机制与推理时干预（ITI）的新型框架，可在不重新训练基础模型的情况下显著提升基于LLM的RTL代码生成准确率。MeltRTL包含三项关键创新：（1）多专家注意力架构，能够动态地将设计规约路由至专用专家网络，实现对不同硬件类别的针对性推理；（2）推理时干预机制，通过非线性探针在生成过程中检测并修正硬件相关的错误；（3）高效干预框架，选择性地作用于专家特定的注意力头，计算开销极小。我们在VerilogEval基准测试上评估MeltRTL，实现了96%的可综合性与60%的功能正确率，而基础LLM的对应指标分别为85.3%和45.3%。这些改进完全在推理阶段获得，仅产生27%的计算开销且无需模型微调，使得MeltRTL可直接部署于现有预训练LLM。消融研究进一步揭示了多专家架构与ITI的互补优势，突显二者结合产生的协同效应。