The Embedded Trace Macrocell (ETM) is a standard component of Arm's CoreSight architecture, present in a wide range of platforms and primarily designed for tracing and debugging. In this work, we demonstrate that it can be repurposed to implement a novel hardware-assisted memory bandwidth regulator, providing a portable and effective solution to mitigate memory interference in real-time multicore systems. ETM2 requires minimal software intervention and bridges the gap between the fine-grained microsecond resolution of MemPol and the portability and reaction time of interrupt-based solutions, such as MemGuard. We assess the effectiveness and portability of our design with an evaluation on a large number of 64-bit Arm boards, and we compare ETM2 with previous works using a setup based on the San Diego Vision Benchmark Suite on the AMD Zynq UltraScale+. Our results show the scalability of the approach and highlight the design trade-offs it enables. ETM2 is effective in enforcing per-core memory bandwidth regulation and unlocks new regulation options that were infeasible under MemGuard and MemPol.

翻译：嵌入式追踪宏单元（ETM）是Arm CoreSight架构的标准组件，广泛存在于各类平台中，主要设计用于追踪和调试。本研究表明，ETM可被重新用于实现一种新型硬件辅助内存带宽调控器，为实时多核系统中的内存干扰问题提供了一种可移植且高效的解决方案。ETM2仅需极少的软件干预，填补了MemPol的微秒级细粒度分辨率与基于中断的解决方案（如MemGuard）的可移植性和响应时间之间的空白。我们通过在大量64位Arm开发板上进行评估，验证了该设计的有效性和可移植性，并基于AMD Zynq UltraScale+平台采用圣地亚哥视觉基准测试套件搭建实验环境，将ETM2与已有方案进行对比。实验结果表明该方法具有良好的可扩展性，并揭示了其实现的设计权衡。ETM2能有效实施按核内存带宽调控，并实现了MemGuard和MemPol无法支持的新型调控机制。