The ATLAS experiment measures the properties of particles that are products of proton-proton collisions at the LHC. The ATLAS detector will undergo a major upgrade before the high luminosity phase of the LHC. The ATLAS liquid argon calorimeter measures the energy of particles interacting electromagnetically in the detector. The readout electronics of this calorimeter will be replaced during the aforementioned ATLAS upgrade. The new electronic boards will be based on state-of-the-art field-programmable gate arrays (FPGA) from Intel allowing the implementation of neural networks embedded in firmware. Neural networks have been shown to outperform the current optimal filtering algorithms used to compute the energy deposited in the calorimeter. This article presents the implementation of a recurrent neural network (RNN) allowing the reconstruction of the energy deposited in the calorimeter on Stratix 10 FPGAs. The implementation in high level synthesis (HLS) language allowed fast prototyping but fell short of meeting the stringent requirements in terms of resource usage and latency. Further optimisations in Very High-Speed Integrated Circuit Hardware Description Language (VHDL) allowed fulfilment of the requirements of processing 384 channels per FPGA with a latency smaller than 125 ns.

翻译：ATLAS实验测量LHC质子-质子碰撞产生粒子的性质。ATLAS探测器将在LHC高亮度阶段前进行重大升级。ATLAS液氩量能器测量在探测器中通过电磁相互作用粒子的能量。该量能器的读出电子学将在上述ATLAS升级期间被更换。新的电子板将基于英特尔最先进的现场可编程门阵列（FPGA），允许在固件中嵌入神经网络。研究表明，神经网络优于当前用于计算量能器沉积能量的最优滤波算法。本文介绍了在Stratix 10 FPGA上实现递归神经网络（RNN）以重建量能器沉积能量的方案。采用高层综合（HLS）语言实现可实现快速原型设计，但未能满足资源占用和延迟方面的严格要求。通过甚高速集成电路硬件描述语言（VHDL）的进一步优化，实现了每FPGA处理384通道且延迟小于125 ns的要求。