Neuroevolution is a powerful method of applying an evolutionary algorithm to refine the performance of artificial neural networks through natural selection; however, the fitness evaluation of these networks can be time-consuming and computationally expensive, particularly for continuous time recurrent neural networks (CTRNNs) that necessitate the simulation of differential equations. To overcome this challenge, field programmable gate arrays (FPGAs) have emerged as an increasingly popular solution, due to their high performance and low power consumption. Further, their ability to undergo dynamic and partial reconfiguration enables the extremely rapid evaluation of the fitness of CTRNNs, effectively addressing the bottleneck associated with conventional methods. By incorporating fitness evaluation directly upon the programmable logic of the FPGA, hyper-parallel evaluation becomes feasible, dramatically reducing the time required for assessment. This inherent parallelism of FPGAs accelerates the entire neuroevolutionary process by several orders of magnitude, facilitating faster convergence to an optimal solution. The work presented in this study demonstrates the potential of utilizing dynamic and partial reconfiguration on capable FPGAs as a powerful platform for neuroevolving dynamic neural networks.

翻译：神经演化是一种通过自然选择优化人工神经网络性能的强大方法，其核心在于应用进化算法；然而，这类网络的适应度评估往往耗时且计算成本高昂，尤其对于需要求解微分方程的连续时间递归神经网络（CTRNNs）而言。为克服这一挑战，现场可编程门阵列（FPGAs）凭借其高性能与低功耗特性，逐渐成为广受欢迎的解决方案。更关键的是，FPGA具备动态部分重构能力，可实现对CTRNN适应度的极速评估，有效突破传统方法中的性能瓶颈。通过将适应度评估直接集成于FPGA的可编程逻辑中，超并行评估成为可能，从而大幅缩减评估所需时间。FPGA固有的并行性可将整个神经演化过程加速数个数量级，促使更快收敛至最优解。本研究表明，利用具备动态部分重构能力的FPGA作为神经演化动态神经网络的强大平台，具有巨大潜力。