The rapid advancement of neuromorphic technology aims to address the memory wall challenge inherent in conventional von Neumann architectures. This paper critically examines current digital neuromorphic processors and their strategies to mitigate this bottleneck. While designed to bring computation closer to memory through distributed architectures, our findings indicate that on-chip memory systems, including SRAM and emerging technologies like STT-MRAM, have become significant consumers of area and energy, leading to a new memory wall. Through an analysis of energy and area efficiency in various memory technologies, we argue that without a re-evaluation of memory organization, digital neuromorphic processors may struggle to compete effectively in edge and embedded applications. We conclude with potential pathways for future research to overcome the limitations of on-chip memory in neuromorphic systems.

翻译：神经形态技术的快速发展旨在解决传统冯·诺依曼架构固有的存储墙难题。本文对当前数字神经形态处理器及其缓解这一瓶颈的策略进行了批判性审视。尽管该架构通过分布式设计力求将计算向存储靠近，但我们的研究发现，包括SRAM及STT-MRAM等新兴技术在内的片上存储系统，已成为面积与能耗的重要消耗源，由此催生了新的存储墙。通过对不同存储技术的能效与面积效率分析，我们认为若不对存储组织方式进行重新评估，数字神经形态处理器在边缘与嵌入式应用中的竞争力将面临挑战。最后，我们提出了未来研究克服神经形态系统片上存储局限的潜在方向。