Domain-Specific architectures with accelerators for machine learning and signal processing require efficient bulk data movement and high-bandwidth access to large datasets. Such capabilities are often absent from minimal open-source microcontrollers (MCUs). We present HyperCroc, an extension to the end-to-end open-source RISC-V Croc system-on-chip (SoC) integrating a silicon-proven HyperBus controller for off-chip DRAM and Flash memory access and a DMA engine, providing a practical MCU-class platform with streamlined plug-in support for domain-specific acceleration. HyperBus offers a low-pin-count PSDRAM interface at up to 400 MB/s, enabling bandwidth-scaled dataset access, while the DMA engine enables autonomous, high-throughput transfers without CPU intervention. HyperCroc preserves Croc's open-source synthesis and physical implementation flow targeting IHP's open 130 nm process design kit (PDK); the full chip can be implemented in under one hour on a consumer-grade workstation. We further report first silicon measurements from MLEM, the first Croc tapeout, confirming that the silicon is fully functional at 72 MHz @ 1.2 V and validating the end-to-end flow.

翻译：面向机器学习与信号处理的领域专用架构需要高效的大规模数据搬移能力以及对海量数据集的高带宽访问。这类能力在精简型开源微控制器中往往缺失。本文提出HyperCroc——一种对端到端开源RISC-V Croc片上系统的扩展方案，其集成经过硅验证的HyperBus控制器（用于片外DRAM与闪存访问）及DMA引擎，构建了一个具备领域专用加速器便捷插件支持功能的实用级微控制器平台。HyperBus通过低引脚数PSDRAM接口提供高达400 MB/s的传输速率，实现了带宽可扩展的数据集访问；而DMA引擎则支持无需CPU干预的自主高吞吐量数据传输。HyperCroc完整保留了Croc基于IHP开源130纳米工艺设计套件的端到端综合与物理实现流程，整颗芯片可在消费级工作站上于一小时内完成实现。我们进一步报告了首次流片（即首款Croc芯片MLEM）的实测数据，确认芯片在1.2V电压下以72MHz频率全功能运行，验证了该端到端流程的有效性。