Recent announcements have shown the viability of end-to-end open-source (OS) Linux-capable RISC-V systems on chip (SoCs). However, practical application and software development platforms require efficient non-volatile storage, which is not adequately served by common SPI-based interfaces due to their limited throughput. Secure Digital (SD) cards are the de facto standard storage medium for embedded Linux systems; efficient SD host controller (SDHC) integration is thus essential for open-source RISC-V platforms. We present an OS SD host controller interface (SDHCI) peripheral integrated into the end-to-end OS Cheshire RISC-V SoC platform. The controller and its software stack are designed with full awareness of CVA6's memory system and Linux driver behavior; during evaluation, we identify a significant performance bottleneck caused by the RISC-V memory model and CVA6's implementation of the fence instruction, which flushes the pipeline and data cache on memory-mapped register accesses when cache management operations (CMOs) are unavailable. By customizing the driver's register access paths and avoiding unnecessary fences, we substantially reduced this overhead. Our fully OS controller achieves up to 11.1 MB/s throughput, approaching the 12.5 MB/s limit of the SD interface and providing up to 6.5 times the throughput of SPI-based storage.

翻译：近期进展表明，端到端开源Linux兼容RISC-V片上系统已具备可行性。然而，实际应用与软件开发平台需要高效的非易失性存储，而常见的基于SPI的接口因吞吐量有限无法满足需求。安全数字卡已成为嵌入式Linux系统事实上的标准存储介质，因此高效集成SD主机控制器对开源RISC-V平台至关重要。本文提出一种集成于端到端开源Cheshire RISC-V SoC平台的开源SD主机控制器接口外设。该控制器及其软件栈在设计时充分考虑了CVA6存储系统与Linux驱动程序的行为特性；在评估过程中，我们发现了由RISC-V内存模型及CVA6对fence指令的实现方式导致的显著性能瓶颈——当缓存管理操作不可用时，对内存映射寄存器的访问会触发流水线与数据缓存刷新。通过定制驱动程序的寄存器访问路径并避免不必要的fence操作，我们大幅降低了此类开销。最终实现的全开源控制器可实现高达11.1 MB/s的吞吐量，接近SD接口12.5 MB/s的理论极限，并提供最高达基于SPI存储方案的6.5倍吞吐性能。