Recently, RISC-V has contributed to the development of IoT devices, requiring architectures that balance energy efficiency, compact area, and integrated security. However, most recent RISC-V cores for IoT prioritize either area footprint or energy efficiency, while adding cryptographic support further compromises compactness. As a result, truly integrated architectures that simultaneously optimize efficiency and security remain largely unexplored, leaving constrained IoT environments vulnerable to performance and security trade-offs. In this paper, we introduce SAILOR, an energy-efficient and scalable ultra-lightweight RISC-V core family for cryptographic applications in IoT. Our design is modular and spans 1-, 2-, 4-, 8-, 16-, and 32-bit serialized execution data-paths, prioritizing minimal area. This modular design and adaptable data-path minimizes the overhead of integrating RISC-V cryptography extensions, achieving low hardware cost while significantly improving energy efficiency. We validate our design approach through a comprehensive analysis of area, energy, and efficiency trade-offs. The results surpass state-of-the-art solutions in both performance and energy efficiency by up to 13x and reduce area by up to 59 %, demonstrating that lightweight cryptographic features can be added without prohibitive overhead, and that energy- or area-efficient designs need not compromise performance.

翻译：近年来，RISC-V推动了物联网设备的发展，其架构需在能效、紧凑面积与集成安全性之间取得平衡。然而，当前多数面向物联网的RISC-V内核往往侧重面积占用或能效单一维度，而加密功能的引入又会进一步牺牲紧凑性。因此，能同时优化效率与安全性的真正集成化架构仍鲜有探索，导致资源受限的物联网环境常面临性能与安全的权衡困境。本文提出SAILOR——一个面向物联网加密应用的高能效、可扩展超轻量级RISC-V内核系列。我们的设计采用模块化架构，覆盖1位、2位、4位、8位、16位及32位串行化执行数据通路，并以最小化面积为优先目标。这种模块化设计与可适配数据通路显著降低了集成RISC-V加密扩展的开销，在实现低硬件成本的同时大幅提升能效。我们通过全面的面积、能效与性能权衡分析验证了该设计方法。实验结果表明：SAILOR在性能与能效上均超越现有最优方案（最高提升13倍），面积最多减少59%。这证明轻量级加密功能的引入无需承担过高开销，且能效或面积优化设计不必以性能妥协为代价。