Hybrid quantum--classical workflows often execute large ensembles of circuits that differ syntactically but implement identical operations, leading to substantial redundant computation. To address this, we introduce the Quantum Circuit Cache, a content-addressable system that detects semantic equivalence and reuses previously computed results across executions, backends, and workflow stages. Our approach combines ZX-calculus reduction with isomorphism-invariant Weisfeiler--Leman graph hashing to generate deterministic circuit identifiers, enabling constant-time lookup in distributed caches supporting both lightweight LMDB and scalable Redis deployments. The system integrates transparently into hybrid HPC workflows and remains backend-agnostic across CPU, GPU, and QPU environments. We evaluate the system on MareNostrum 5 with two representative workloads: distributed wire cutting and Differential Evolution-based QAOA optimization. For wire cutting, caching eliminates up to 91.98% of redundant subcircuit simulations, yielding speedups up to 7.0 times on a single node and maintaining advantages at scale, with Redis-based caching achieving up to 1.6 times speedups under high parallelism. Validation on a 35-qubit superconducting QPU confirms these benefits, achieving an 11.2 times speedup on real hardware. In distributed QAOA optimization, equivalence-aware caching avoids up to 27.6% of circuit evaluations and consistently reduces execution cost without altering the optimization algorithm. In both cases, reuse grows with concurrency and circuit structure, highlighting redundancy as a major systems bottleneck and demonstrating the effectiveness of our Quantum Circuit Cache.

翻译：混合量子-经典工作流通常需要执行大量语法不同但实现相同运算的线路，导致大量冗余计算。为解决此问题，我们提出量子线路缓存（Quantum Circuit Cache），一种内容可寻址系统，可检测语义等价性并跨执行、后端和工作流阶段重用先前计算结果。我们的方法结合ZX-微积分化简与同构不变的Weisfeiler-Leman图哈希，生成确定性线路标识符，支持在轻量级LMDB和可扩展Redis部署的分布式缓存中实现常数时间查找。该系统透明集成到混合HPC工作流中，并在CPU、GPU和QPU环境下保持后端无关性。我们在MareNostrum 5上使用两个代表性工作负载评估系统：分布式线路切割和基于差分进化的QAOA优化。在线路切割中，缓存消除高达91.98%的冗余子线路模拟，单节点加速比达7.0倍，且优势在扩展时保持；高并行度下基于Redis的缓存加速比达1.6倍。在35量子比特超导QPU上的验证确认了这些优势，实际硬件加速比达11.2倍。在分布式QAOA优化中，等价感知缓存避免高达27.6%的线路评估，且持续降低执行成本而不改变优化算法。两种情况下，重用度随并发性和线路结构增长，凸显冗余作为主要系统瓶颈，并证明了量子线路缓存的效性。