General-purpose processors feature a limited number of instructions based on an instruction set. They can be numerous, such as with vector extensions that include hundreds or thousands of instructions, but this comes at a cost; they are often unable to express arbitrary tasks efficiently. This paper explores the concept of having reconfigurable instructions by incorporating reconfigurable areas in a softcore. It follows a relatively-recently proposed computer architecture concept for seamlessly loading instruction implementation-carrying bitstreams from main memory. The resulting softcore is entirely evaluated on an FPGA, essentially having an FPGA-on-an-FPGA for the instruction implementations, with no notable operating frequency overhead. This is achieved with a custom FPGA architecture called LUTstruction, which is tailored towards low-latency for custom instructions and wide reconfiguration, as well as a soft implementation for the purposes of architectural exploration.

翻译：通用处理器基于指令集提供有限数量的指令。这些指令可以非常庞大，例如包含数百或数千条指令的向量扩展，但这需要付出代价：它们通常无法高效地表达任意任务。本文探讨了通过在软核中集成可重构区域来实现可重构指令的概念。该研究遵循一种近期提出的计算机体系结构理念，即从主存无缝加载携带指令实现功能的比特流。所实现的软核完全在FPGA上进行评估，其指令实现本质上构成了“FPGA上的FPGA”，且未产生显著的工作频率开销。这一成果通过名为LUTstruction的自定义FPGA架构实现，该架构专为定制指令的低延迟与广泛重构能力而设计，同时采用软实现方案以支持体系结构探索。