The speed of modern digital systems is severely limited by memory latency (the ``Memory Wall'' problem). Data exchange between Logic and Memory is also responsible for a large part of the system energy consumption. Logic--In--Memory (LiM) represents an attractive solution to this problem. By performing part of the computations directly inside the memory the system speed can be improved while reducing its energy consumption. LiM solutions that offer the major boost in performance are based on the modification of the memory cell. However, what is the cost of such modifications? How do these impact the memory array performance? In this work, this question is addressed by analysing a LiM memory array implementing an algorithm for the maximum/minimum value computation. The memory array is designed at physical level using the FreePDK $\SI{45}{\nano\meter}$ CMOS process, with three memory cell variants, and its performance is compared to SRAM and CAM memories. Results highlight that read and write operations performance is worsened but in--memory operations result to be very efficient: a 55.26\% reduction in the energy--delay product is measured for the AND operation with respect to the SRAM read one; therefore, the LiM approach represents a very promising solution for low--density and high--performance memories.

翻译：现代数字系统的速度严重受限于存储器延迟（即“存储墙”问题）。逻辑单元与存储器之间的数据交换也是系统能耗的重要组成部分。逻辑内存储（LiM）为此问题提供了一种有吸引力的解决方案——通过直接在存储器内部执行部分计算，可在提升系统速度的同时降低能耗。能带来显著性能提升的LiM方案通常基于对存储单元的修改。然而，此类修改的代价是什么？它们对存储阵列性能有何影响？本文通过分析实现最大值/最小值计算算法的LiM存储阵列来探讨这一问题。该存储阵列采用FreePDK $\SI{45}{\nano\meter}$ CMOS工艺在物理级进行设计，包含三种存储单元变体，并将其性能与SRAM和CAM存储器进行比较。结果表明，读写操作性能有所劣化，但存储内操作效率极高：AND操作相对SRAM读取操作的能量延迟积降低了55.26%。因此，LiM方法对于低密度、高性能存储器而言是一种极具前景的解决方案。