Realizing the full potential of quantum computing requires large-scale quantum computers capable of running quantum error correction (QEC) to mitigate hardware errors and maintain quantum data coherence. While quantum computers operate within a two-level computational subspace, many processor modalities are inherently multi-level systems. This leads to occasional leakage into energy levels outside the computational subspace, complicating error detection and undermining QEC protocols. The problem is particularly severe in engineered qubit devices like superconducting transmons, a leading technology for fault-tolerant quantum computing. Addressing this challenge requires effective multi-level quantum system readout to identify and mitigate leakage errors. We propose a scalable, high-fidelity three-level readout that reduces FPGA resource usage by $60\times$ compared to the baseline while reducing readout time by 20\%, enabling faster leakage detection. By employing matched filters to detect relaxation and excitation error patterns and integrating a modular lightweight neural network to correct crosstalk errors, the protocol significantly reduces hardware complexity, achieving a $100\times$ reduction in neural network size. Our design supports efficient, real-time implementation on off-the-shelf FPGAs, delivering a 6.6\% relative improvement in readout accuracy over the baseline. This innovation enables faster leakage mitigation, enhances QEC reliability, and accelerates the path toward fault-tolerant quantum computing.

翻译：实现量子计算的全部潜力需要大规模量子计算机，这些计算机能够运行量子纠错（QEC）以减轻硬件错误并维持量子数据的相干性。虽然量子计算机在两级计算子空间内运行，但许多处理器模式本质上是多能级系统。这导致偶尔会泄漏到计算子空间之外的能量能级，从而使错误检测复杂化并破坏QEC协议。这个问题在工程化量子比特设备（如超导transmon，这是容错量子计算的一项领先技术）中尤为严重。应对这一挑战需要有效的多能级量子系统读取，以识别和减轻泄漏错误。我们提出了一种可扩展、高保真度的三能级读取方案，与基线相比，其FPGA资源使用量减少了$60\times$，同时读取时间缩短了20%，从而实现更快的泄漏检测。该协议通过采用匹配滤波器来检测弛豫和激发错误模式，并集成一个模块化的轻量级神经网络来校正串扰错误，显著降低了硬件复杂度，实现了神经网络规模$100\times$的缩减。我们的设计支持在商用FPGA上高效、实时地实现，相比基线，读取准确率相对提升了6.6%。这项创新实现了更快的泄漏缓解，增强了QEC的可靠性，并加速了通往容错量子计算的道路。