Rowhammer is a well-studied DRAM phenomenon wherein multiple activations to a given row can cause bit flips in adjacent rows. Many mitigation techniques have been introduced to address Rowhammer, with some support being incorporated into the JEDEC DDR5 standard for per-row-activation-counter (PRAC) and refresh-management (RFM) systems. Mitigation schemes built on these mechanisms claim to have various levels of area, power, and performance overheads. To date the evaluation of existing mitigation schemes typically neglects the impact of other memory system components such as hardware prefetchers. Nearly all modern systems incorporate hardware prefetching and these can significantly improve processor performance through speculative cache population. These prefetchers induce higher numbers of downstream memory requests and increase DRAM activation rates. The performance overhead of Rowhammer mitigations are tied directly to memory access patterns, exposing both hardware prefetchers and Rowhammer mitigations to cross-interaction. We find that the performance improvement provided by prior-work hardware prefetchers is often severely impacted by Rowhammer mitigations. In effect, much of the benefit of speculative memory references from prefetching lies in accelerating and reordering DRAM references in ways that trigger mitigations, significantly reducing the benefits of prefetching. This work proposes the Optimized Row Access Prefetcher (ORAP), leveraging last-level-cache (LLC) space to cache large portions of DRAM rowbuffer contents to reduce the need for future activations. Working with the state-of-the-art Berti prefetcher, ORAP reduces DRAM activation rates by 51.3% and achieves a 4.6% speedup over the prefetcher configuration of Berti and SPP-PPF when prefetching in an RFM-mitigated memory system. Under PRAC mitigations, ORAP reduces energy overheads by 11.8%.

翻译：Rowhammer是一种经过深入研究的DRAM现象，其中对特定行的多次激活可能导致相邻行发生比特翻转。目前已提出多种缓解Rowhammer的技术，部分技术已纳入JEDEC DDR5标准，包括行激活计数器（PRAC）和刷新管理（RFM）系统。基于这些机制的防护方案声称具有不同程度的面積、功耗和性能开销。迄今为止，现有防护方案的评估通常忽略了硬件预取器等内存系统其他组件的影响。几乎所有现代系统都包含硬件预取器，它们通过推测性缓存填充显著提升处理器性能。这些预取器会引发更多下游内存请求并提高DRAM激活频率。Rowhammer防护的性能开销与内存访问模式直接相关，使得硬件预取器与Rowhammer防护机制产生交叉影响。我们发现既有硬件预取器带来的性能提升常因Rowhammer防护措施而严重受损。实际上，预取带来的推测性内存访问优势很大程度上依赖于以触发防护机制的方式加速和重排DRAM访问，这显著削弱了预取的效益。本研究提出优化行访问预取器（ORAP），利用末级缓存（LLC）空间缓存DRAM行缓冲区的绝大部分内容，以减少未来激活需求。结合先进的Berti预取器，在RFM防护内存系统中进行预取时，ORAP将DRAM激活频率降低51.3%，相比Berti与SPP-PPF的预取器配置实现4.6%的加速。在PRAC防护机制下，ORAP可降低11.8%的能耗开销。