Spiking Neural Networks (SNNs) offer inherent advantages for low-power inference through sparse, event-driven computation. However, the theoretical energy benefits of SNNs are often decoupled from real hardware performance due to the opaque relationship between training-time choices and inference-time sparsity. While prior work has focused on weight pruning and compression, the role of training hyperparameters -- specifically surrogate gradient functions and neuron model configurations -- in shaping hardware-level activation sparsity remains underexplored. This paper presents a workload characterization study quantifying the sensitivity of hardware latency to SNN hyperparameters. We decouple the impact of surrogate gradient functions (e.g., Fast Sigmoid, Spike Rate Escape) and neuron models (LIF, Lapicque) on classification accuracy and inference efficiency across three event-based vision datasets: DVS128-Gesture, N-MNIST, and DVS-CIFAR10. Our analysis reveals that standard accuracy metrics are poor predictors of hardware efficiency. While Fast Sigmoid achieves the highest accuracy on DVS-CIFAR10, Spike Rate Escape reduces inference latency by up to 12.2% on DVS128-Gesture with minimal accuracy trade-offs. We also demonstrate that neuron model selection is as critical as parameter tuning; transitioning from LIF to Lapicque neurons yields up to 28% latency reduction. We validate on a custom cycle-accurate FPGA-based SNN instrumentation platform, showing that sparsity-aware hyperparameter selection can improve accuracy by 9.1% and latency by over 2x compared to baselines. These findings establish a methodology for predicting hardware behavior from training parameters. The RTL and reproducibility artifacts are at https://zenodo.org/records/18893738.

翻译：脉冲神经网络（SNNs）凭借稀疏、事件驱动的计算机制，在低功耗推理方面具有天然优势。然而，由于训练时选择与推理时稀疏性之间的隐式关联，SNNs的理论能效优势往往与实际硬件性能脱节。尽管现有研究主要关注权重剪枝与压缩，但训练超参数——特别是代理梯度函数与神经元模型配置——如何影响硬件级激活稀疏性仍鲜有探索。本文通过工作负载特征研究，量化了硬件延迟对SNN超参数的敏感性。我们解耦了代理梯度函数（如Fast Sigmoid、Spike Rate Escape）与神经元模型（LIF、Lapicque）对分类精度及推理效率的影响，并在三个基于事件的视觉数据集（DVS128-Gesture、N-MNIST、DVS-CIFAR10）上进行了评估。分析表明，标准精度指标难以有效预测硬件效率：尽管Fast Sigmoid在DVS-CIFAR10上达到最高精度，但Spike Rate Escape在DVS128-Gesture上以极小精度损失为代价，将推理延迟降低达12.2%。我们还证明，神经元模型选择与参数调优同等关键——从LIF神经元切换至Lapicque神经元可实现最高28%的延迟缩减。基于自研的周期精确FPGA SNN测试平台验证发现，与基线相比，稀疏感知超参数选择可将精度提升9.1%，同时延迟优化超过2倍。这些发现建立了从训练参数预测硬件行为的方法论。RTL设计与可复现性成果见https://zenodo.org/records/18893738。