Non-volatile memories (NVMs) offer negligible leakage power consumption, high integration density, and data retention, but their non-volatility also raises the risk of data exposure. Conventional encryption techniques such as the Advanced Encryption Standard (AES) incur large area overheads and performance penalties, motivating lightweight XOR-based in-situ encryption schemes with low area and power requirements. This work proposes an ultra-dense single-transistor encrypted cell using ferroelectric FET (FeFET) devices, which, to our knowledge, is the first to eliminate the two-memory-devices-per-encrypted-cell requirement in XOR-based schemes, enabling encrypted memory arrays to maintain the same number of storage devices as unencrypted arrays. The key idea is an in-memory single-FeFET XOR scheme, where the ciphertext is encoded in the device threshold voltage and leverages the direction-dependent current flow of the FeFET for single-cycle decryption; eliminating complementary bit storage also removes the need for two write cycles, allowing faster encryption. We extend the approach to multi-level-cell (MLC) FeFETs to store multiple bits per transistor. We validate the proposed idea through both simulation and experimental evaluations. Our analysis on a 128x128-bit array shows 2x higher encryption/decryption throughput than prior FeFET work and 45.2x/14.12x improvement over AES, while application-level evaluations using neural-network benchmarks demonstrate average latency reductions of 50% and 95% compared to prior FeFET-based and AES-based schemes, respectively.

翻译：非易失性存储器（NVM）具有可忽略的漏电功耗、高集成密度和数据保持能力，但其非易失性也带来了数据暴露的风险。传统加密技术如高级加密标准（AES）会产生较大的面积开销和性能损失，这促使了具有低面积和低功耗需求的轻量级基于XOR的原位加密方案的发展。本研究提出了一种采用铁电场效应晶体管（FeFET）器件的超密集单晶体管加密单元，据我们所知，这是首个在基于XOR的方案中消除了每个加密单元需要两个存储器件的要求，使得加密存储器阵列能够保持与未加密阵列相同数量的存储器件。其核心思想是一种内存内单FeFET XOR方案，其中密文编码在器件阈值电压中，并利用FeFET的方向依赖性电流进行单周期解密；消除互补位存储也省去了两个写入周期的需求，从而实现更快的加密。我们将该方法扩展到多级单元（MLC）FeFET，以在每个晶体管中存储多个比特。我们通过仿真和实验评估验证了所提出的方案。在128x128位阵列上的分析表明，加密/解密吞吐量比先前的FeFET工作提高了2倍，比AES提高了45.2倍/14.12倍，而使用神经网络基准测试的应用级评估显示，与先前基于FeFET和基于AES的方案相比，平均延迟分别降低了50%和95%。