In this work, we explore an energy-efficient implementation of the polyphase network for a filter bank multicarrier (FBMC) system. The network is approximated using a greedy algorithm based on matching pursuits (MP) that converts the numerical representation directly from floating point to sum of signed powers of two (SOPOT), which is key for a multiplierless implementation. We compare this technique with other state-of-the-art methods for designing multiplierless hardware, and show that our technique achieves superior performance with similar computational complexity.

翻译：本文研究滤波器组多载波（FBMC）系统中多相网络的能效实现方法。该网络采用基于匹配追踪（MP）的贪心算法进行逼近，将数值表示直接从浮点数转换为有符号二次幂和（SOPOT）形式，这是实现无乘法器硬件设计的关键。我们将该技术与当前其他先进的无乘法器硬件设计方法进行比较，结果表明在计算复杂度相近的情况下，本文所提技术能实现更优越的性能。