We propose a new numerical method to estimate the fault tolerance of failure modes in digital circuit structures with a generative network sampling technique. From a random input of generated bitwise configurations of ideally digitalised analog currents in the digital circuit design with classical logical gates, expected output currents are compared to the realistic signals of a numerical experiment at the discriminator part of the Generative Adversarial Network (GAN) to calculate the deviation from ideal digital electronic signals, including various error modes, such as missing or interchanged logical devices. From the present analysis of a representation of the GAN in terms of complex variables, it is possible to evaluate the robustness in electronic designs by differentiating the impact of failure modes associated with different classical logical elements in the circuit.

翻译：我们提出了一种基于生成网络采样技术来估计数字电路结构中故障模式容错性的新数值方法。通过随机输入由经典逻辑门构成的数字电路设计中理想数字化模拟电流的生成比特位配置，将期望输出电流与生成对抗网络（GAN）判别器部分数值实验中的实际信号进行比较，以计算与理想数字电子信号的偏差，涵盖包括逻辑器件缺失或互换在内的多种错误模式。基于对用复变量表示的GAN所进行的分析，通过区分电路中不同经典逻辑元件相关故障模式的影响，可以评估电子设计的鲁棒性。