Peripheral Component Interconnect Express (PCIe) is the de facto interconnect standard for high-speed peripherals and CPUs. Prototyping and optimizing PCIe devices for emerging scenarios is an ongoing challenge. Since Transaction Layer Packets (TLPs) capture device-CPU interactions, it is crucial to analyze and generate realistic TLP traces for effective device design and optimization. Generative AI offers a promising approach for creating intricate, custom TLP traces necessary for PCIe hardware and software development. However, existing models often generate impractical traces due to the absence of PCIe-specific constraints, such as TLP ordering and causality. This paper presents Phantom, the first framework that treats TLP trace generation as a generative AI problem while incorporating PCIe-specific constraints. We validate Phantom's effectiveness by generating TLP traces for an actual PCIe network interface card. Experimental results show that Phantom produces practical, large-scale TLP traces, significantly outperforming existing models, with improvements of up to 1000$\times$ in task-specific metrics and up to 2.19$\times$ in Frechet Inception Distance (FID) compared to backbone-only methods.

翻译：外围组件互连高速（PCIe）是高速外设与CPU之间事实上的互连标准。针对新兴场景的原型设计与优化PCIe设备是一项持续存在的挑战。由于事务层数据包（TLP）捕获了设备与CPU的交互行为，分析和生成真实的TLP迹线对于有效的设备设计与优化至关重要。生成式人工智能为创建PCIe硬件与软件开发所需的复杂定制TLP迹线提供了前景广阔的方法。然而，现有模型常因缺乏PCIe特定约束（如TLP顺序性与因果性）而生成不切实际的迹线。本文提出Phantom，这是首个将TLP迹线生成视为生成式人工智能问题，同时纳入PCIe特定约束的框架。我们通过为实际PCIe网络接口卡生成TLP迹线验证了Phantom的有效性。实验结果表明，Phantom能生成实用的大规模TLP迹线，显著优于现有模型：在任务特定指标上最高提升1000$\times$，与纯骨干方法相比，在弗雷歇起始距离（FID）指标上最高提升2.19$\times$。