RowHammer vulnerability continues to intensify with DRAM scaling, reducing the activation threshold needed to induce bitflips and rendering existing defenses such as TRR, ECC, and refresh-based mechanisms vulnerable to sophisticated multi-bank hammering patterns. This work presents ARTA, a lightweight reinforcement-learning-based throttling mechanism that detects and suppresses RowHammer activity by monitoring fine-grained memory access behavior within the DRAM refresh window (t_REFW) and dynamically adjusting core throughput using a Q-learning frequency scaling governor. ARTA requires no DRAM-side hardware modification or offline training, using small SRAM structures in the memory controller -- a per-core, per-bank FIFO queue (CBF) and a compact Q-table -- for immediate deployment. Our evaluation shows that ARTA eliminates all bitflips at N_BO values down to 64, reduces bitflips up to 22K times at N_BO of 20, and improves performance up to 73.6% over state-of-the-art mitigation mechanisms by limiting preventive action overheads for improved memory bandwidth throughput. These results demonstrate that adaptive RL-based throttling provides robust, scalable, and high-performance RowHammer mitigation for emerging DRAM systems.

翻译：RowHammer漏洞随着DRAM的微缩而持续加剧，降低了诱发比特翻转所需的激活阈值，并使得TRR、ECC及基于刷新机制的现有防御措施容易受到复杂多存储体锤击模式的攻击。本文提出ARTA，一种基于强化学习的轻量级节流机制，通过监控DRAM刷新窗口（t_REFW）内的细粒度内存访问行为，并利用Q学习频率调节控制器动态调整核心吞吐量，从而检测并抑制RowHammer活动。ARTA无需DRAM侧硬件修改或离线训练，仅需在内存控制器中采用小型SRAM结构（每核心每存储体FIFO队列CBF及紧凑型Q表）即可立即部署。评估表明，在N_BO降至64时ARTA能消除所有比特翻转，在N_BO为20时最多可将比特翻转减少2.2万倍；相比现有最先进的缓解机制，通过减少预防性操作开销以提升内存带宽吞吐量，性能最高提升73.6%。这些结果表明，基于自适应强化学习的节流机制可为新兴DRAM系统提供鲁棒、可扩展且高性能的RowHammer缓解方案。