For potential quantum advantage, Variational Quantum Algorithms (VQAs) need high accuracy beyond the capability of today's NISQ devices, and thus will benefit from error mitigation. In this work we are interested in mitigating measurement errors which occur during qubit measurements after circuit execution and tend to be the most error-prone operations, especially detrimental to VQAs. Prior work, JigSaw, has shown that measuring only small subsets of circuit qubits at a time and collecting results across all such subset circuits can reduce measurement errors. Then, running the entire (global) original circuit and extracting the qubit-qubit measurement correlations can be used in conjunction with the subsets to construct a high-fidelity output distribution of the original circuit. Unfortunately, the execution cost of JigSaw scales polynomially in the number of qubits in the circuit, and when compounded by the number of circuits and iterations in VQAs, the resulting execution cost quickly turns insurmountable. To combat this, we propose VarSaw, which improves JigSaw in an application-tailored manner, by identifying considerable redundancy in the JigSaw approach for VQAs: spatial redundancy across subsets from different VQA circuits and temporal redundancy across globals from different VQA iterations. VarSaw then eliminates these forms of redundancy by commuting the subset circuits and selectively executing the global circuits, reducing computational cost (in terms of the number of circuits executed) over naive JigSaw for VQA by 25x on average and up to 1000x, for the same VQA accuracy. Further, it can recover, on average, 45% of the infidelity from measurement errors in the noisy VQA baseline. Finally, it improves fidelity by 55%, on average, over JigSaw for a fixed computational budget. VarSaw can be accessed here: https://github.com/siddharthdangwal/VarSaw.

翻译：为了获得潜在的量子优势，变分量子算法需要超越当今NISQ设备能力的精度，因此将受益于误差缓解技术。本文聚焦于缓解测量误差——这类误差发生在电路执行后的量子比特测量过程中，是最易出错的环节，尤其对VQA算法影响显著。先前的工作JigSaw已证明，每次仅测量电路中的小量子比特子集，并收集所有子集电路的结果，可以降低测量误差。随后，通过执行完整（全局）原始电路并提取量子比特间的测量相关性，可与子集结果联合构建原始电路的高保真度输出分布。然而，JigSaw的执行成本随电路量子比特数呈多项式增长，当与VQA中多重电路和迭代次数叠加时，最终执行成本会迅速变得难以承受。为解决此问题，我们提出VarSaw，以面向应用定制的方式改进JigSaw，识别出JigSaw方法在VQA中的显著冗余性：跨越不同VQA电路子集的空间冗余，以及跨越不同VQA迭代全局的时序冗余。VarSaw通过交换子集电路并选择性执行全局电路消除这些冗余，在保持相同VQA精度的前提下，将计算成本（以执行电路数量衡量）较原始JigSaw方法平均降低25倍，最高可达1000倍。此外，其平均可恢复含噪VQA基线中因测量误差导致的45%保真度损失。最后，在固定计算预算下，其平均保真度较JigSaw提升55%。VarSaw可通过以下链接访问：https://github.com/siddharthdangwal/VarSaw。