Due to cost benefits, supply chains of integrated circuits (ICs) are largely outsourced nowadays. However, passing ICs through various third-party providers gives rise to many security threats, like piracy of IC intellectual property or insertion of hardware Trojans, i.e., malicious circuit modifications. In this work, we proactively and systematically protect the physical layouts of ICs against post-design insertion of Trojans. Toward that end, we propose TroLLoc, a novel scheme for IC security closure that employs, for the first time, logic locking and layout hardening in unison. TroLLoc is fully integrated into a commercial-grade design flow, and TroLLoc is shown to be effective, efficient, and robust. Our work provides in-depth layout and security analysis considering the challenging benchmarks of the ISPD'22/23 contests for security closure. We show that TroLLoc successfully renders layouts resilient, with reasonable overheads, against (i) general prospects for Trojan insertion as in the ISPD'22 contest, (ii) actual Trojan insertion as in the ISPD'23 contest, and (iii) potential second-order attacks where adversaries would first (i.e., before Trojan insertion) try to bypass the locking defense, e.g., using advanced machine learning attacks. Finally, we release all our artifacts for independent verification [2].

翻译：由于成本优势，集成电路供应链如今多采用外包模式。然而，通过第三方供应商流通的集成电路面临着诸多安全威胁，如集成电路知识产权盗版或硬件木马（即恶意电路修改）的植入。本文提出了一种系统性的主动防护方案，旨在防止集成电路物理版图在版图设计完成后被植入木马。为此，我们首次提出TroLLoc方案，该方案创新性地将逻辑锁定与布局强化技术相结合，实现集成电路安全封闭。TroLLoc已完全集成至商业级设计流程中，经证明其具有高效性、有效性和鲁棒性。本文基于ISPD'22/23安全封闭竞赛的挑战性基准，开展了深入的版图与安全分析。研究表明，TroLLoc能以合理开销成功使版图具备以下防御能力：（i）ISPD'22竞赛中的一般木马植入威胁；（ii）ISPD'23竞赛中的实际木马植入场景；（iii）潜在二阶攻击，即攻击者可能在木马植入前优先突破锁定防御（例如采用先进机器学习攻击）。最后，我们公开发布所有研究成果以供独立验证[2]。