To manage exceptions, software relies on a key architectural guarantee, precision: that exceptions appear to execute between instructions. However, this definition, dating back over 60 years, fundamentally assumes a sequential programmers model. Modern architectures such as Arm-A with programmer-observable relaxed behaviour make such a naive definition inadequate, and it is unclear exactly what guarantees programmers have on exception entry and exit. In this paper, we clarify the concepts needed to discuss exceptions in the relaxed-memory setting -- a key aspect of precisely specifying the architectural interface between hardware and software. We explore the basic relaxed behaviour across exception boundaries, and the semantics of external aborts, using Arm-A as a representative modern architecture. We identify an important problem, present yet unexplored for decades: pinning down what it means for exceptions to be precise in a relaxed setting. We describe key phenomena that any definition should account for. We develop an axiomatic model for Arm-A precise exceptions, tooling for axiomatic model execution, and a library of tests. Finally we explore the relaxed semantics of software-generated interrupts, as used in sophisticated programming patterns, and sketch how they too could be modelled.

翻译：为管理异常，软件依赖于一项关键的架构保证——精确性：即异常看似在指令之间执行。然而，这一可追溯至60多年前的定义从根本上假设了顺序编程模型。对于Arm-A等具有程序员可观测宽松行为的现代架构，如此朴素的定义已不再适用，且程序员在异常进入与退出时究竟拥有何种保证尚不明确。本文阐明了在宽松内存环境下讨论异常所需的核心概念——这是精确定义硬件与软件间架构接口的关键方面。我们以Arm-A作为代表性现代架构，探究了跨越异常边界的基本宽松行为及外部中止的语义。我们指出了一个数十年来尚未被探索的重要问题：在宽松环境下明确异常精确性的确切含义。我们描述了任何定义都应考虑的关键现象。我们为Arm-A精确异常构建了公理化模型、公理模型执行工具以及测试库。最后，我们探讨了复杂编程模式中使用的软件生成中断的宽松语义，并概述了如何对它们进行建模。