In this paper, we study the problem of computing the majority function by low-depth monotone circuits and a related problem of constructing low-depth sorting networks. We consider both the classical setting with elementary operations of arity $2$ and the generalized setting with operations of arity $k$, where $k$ is a parameter. For both problems and both settings, there are various constructions known, the minimal known depth being logarithmic. However, there is currently no known construction that simultaneously achieves sub-log-squared depth, effective constructability, simplicity, and has a potential to be used in practice. In this paper we make progress towards resolution of this problem. For computing majority by standard monotone circuits (gates of arity 2) we provide an explicit monotone circuit of depth $O(\log_2^{5/3} n)$. The construction is a combination of several known and not too complicated ideas. For arbitrary arity of gates $k$ we provide a new sorting network architecture inspired by representation of inputs as a high-dimensional cube. As a result we provide a simple construction that improves previous upper bound of $4 \log_k^2 n$ to $2 \log_k^2 n$. We prove the similar bound for the depth of the circuit computing majority of $n$ bits consisting of gates computing majority of $k$ bits. Note, that for both problems there is an explicit construction of depth $O(\log_k n)$ known, but the construction is complicated and the constant hidden in $O$-notation is huge.

翻译：在本文中，我们研究了通过低深度单调电路计算多数函数的问题，以及与之相关的构建低深度排序网络的问题。我们考虑了两个场景：经典场景中基本操作的全元数为 $2$，以及广义场景中基本操作的全元数为 $k$（其中 $k$ 是一个参数）。对于这两个问题及两种场景，已有多种已知的构造方法，目前已知的最小深度为对数级别。然而，目前尚无一种构造能同时实现次对数平方深度、有效可构造性、简洁性，并具备实际应用的潜力。本文在该问题的解决上取得了进展。对于通过标准单调电路（全元数为2的门）计算多数函数，我们给出了一种显式单调电路，其深度为 $O(\log_2^{5/3} n)$。该构造结合了若干已知且不太复杂的思想。对于门的全元数任意为 $k$ 的情况，我们提出了一种新的排序网络架构，其灵感来源于将输入表示为高维立方体。由此，我们提供了一种简单的构造，将之前的上界 $4 \log_k^2 n$ 改进为 $2 \log_k^2 n$。对于由计算 $k$ 位多数函数的门组成的、计算 $n$ 位多数函数的电路深度，我们证明了类似的界。需要注意的是，对于这两个问题，虽然已知一种深度为 $O(\log_k n)$ 的显式构造，但该构造复杂，且 $O$ 符号中隐藏的常数极大。