In recent years, Field-Programmable Gate Arrays (FPGA) have evolved rapidly paving the way for a whole new range of computing paradigms. On the other hand, computer applications are evolving. There is a rising demand for a system that is general-purpose and yet has the processing abilities to accommodate current trends in application processing. This work proposes a design and implementation of a tightly-coupled FPGA-based dual-processor platform. We architect a platform that optimizes the utilization of FPGA resources and allows for the investigation of practical implementation issues such as cache design. The performance of the proposed prototype is then evaluated, as different configurations of a uniprocessor and a dual-processor system are studied and compared against each other and against published results for common industry-standard CPU platforms. The proposed implementation utilizes the Nios II 32-bit embedded soft-core processor architecture designed for the Altera Cyclone III family of FPGAs.

翻译：近年来，现场可编程门阵列（FPGA）的快速发展催生了全新的计算范式。与此同时，计算机应用也在不断演进，市场对兼具通用性与当前应用处理能力的系统需求日益增长。本研究提出并实现了一种基于FPGA的紧耦合双处理器平台。我们设计了一种能够优化FPGA资源利用率，并支持缓存设计等实际实现问题研究的平台架构。通过对比单处理器与双处理器系统的不同配置，并与业界标准CPU平台的公开结果进行验证，评估了所提原型的性能。该实现采用专为Altera Cyclone III系列FPGA设计的Nios II 32位嵌入式软核处理器架构。