This paper introduces a novel simulation tool for analyzing and training neural network models tailored for compute-in-memory hardware. The tool leverages physics-based device models to enable the design of neural network models and their parameters that are more hardware-accurate. The initial study focused on modeling a CMOS-based floating-gate transistor and memristor device using measurement data from a fabricated device. Additionally, the tool incorporates hardware constraints, such as the dynamic range of data converters, and allows users to specify circuit-level constraints. A case study using the MNIST dataset and LeNet-5 architecture demonstrates the tool's capability to estimate area, power, and accuracy. The results showcase the potential of the proposed tool to optimize neural network models for compute-in-memory hardware.

翻译：本文介绍了一种新型仿真工具，专为存内计算硬件定制化神经网络模型的分析与训练而设计。该工具利用基于物理的器件模型，能够实现更符合硬件精度的神经网络模型及其参数设计。初步研究聚焦于基于CMOS工艺的浮栅晶体管与忆阻器器件，利用实测器件数据进行建模。此外，该工具集成了硬件约束条件（如数据转换器的动态范围），并允许用户指定电路级约束。基于MNIST数据集与LeNet-5架构的案例研究验证了该工具在面积、功耗与精度评估方面的能力。结果表明，所提出的工具在优化面向存内计算硬件的神经网络模型方面具有显著潜力。