Large language models (LLMs) have facilitated impressive progress in software engineering, code generation, tooling, and systems. Concurrently, a significant body of research has developed which explores a growing variety of methods and systems for applying LLMs to hardware and chip design (e.g., systems for RTL code generation based on functional description). However, when it comes to open Verilog/RTL code-generation, we need high-quality training samples to build specialized and more effective LLM systems through fine-tuning or low-rank adaptation. Here, we propose a ``judge-renew-check-renew-check'' (JRCRC) pipeline which updates a current public dataset using a hierarchy of state-of-the-art commercial LLM models differing in their costs and capabilities in RTL code generation. This approach achieves a cost-effective mechanism for filtering and refining code-generation samples into a higher-quality training dataset. Our experiments also identify some common weaknesses of LLMs in rule-based reasoning and logic, and consequently, in RTL code-generation. Having identified these weaknesses, we develop an architecture for incorporating pre-processing tools to dynamically assist the LLMs in inferring logical relationships from tabular data formats. With our tools-assisted architecture for RTL code generation, we achieve significant overall performance gains in the VerilogEval benchmark and outperform many state-of-the-art methods. Our LLM4RTL system achieves performance comparable to that of GPT-4O using a significantly much smaller LLM.

翻译：大语言模型在软件工程、代码生成、工具化及系统领域取得了显著进展。与此同时，大量研究工作探索了将大语言模型应用于硬件与芯片设计的多样化方法及系统（例如基于功能描述生成RTL代码的系统）。然而，在开放的Verilog/RTL代码生成领域，我们需要高质量的训练样本，通过微调或低秩适应构建专门化且更高效的大语言模型系统。为此，我们提出一种“评估-修正-检查-修正-检查”管道，通过层次化使用成本与RTL代码生成能力各异的最先进商业大语言模型，对现有公共数据集进行更新。该方法实现了经济高效的机制，用于筛选并精炼代码生成样本，形成更优质的训练数据集。我们的实验还揭示了大语言模型在基于规则的推理与逻辑判断中的若干常见弱点，进而影响其RTL代码生成能力。针对这些弱点，我们开发了一种融合预处理工具的架构，动态辅助大语言模型从表格化数据格式中推导逻辑关系。借助该工具辅助的RTL代码生成架构，我们在VerilogEval基准测试中取得了显著的整体性能提升，并超越了众多现有最优方法。我们的LLM4RTL系统在显著减小模型规模的前提下，实现了与GPT-4O相媲美的性能。